256 Mbit (16mb X16, Multiple Bank, Multi-level, Burst) 1.8v Supply Flash Memory

The M30L0R8000T0 and M30L0R8000B0 are 256 Mbit (16 Mbit x16) non-volatile Flash Memories that may be erased electrically at block level and programmed in-system on a Word-by-Word basis using a 1.7V to 2.0V VDD supply for the circuitry and a 1.7V to 2.0V VDDQ supply for the Input/Out- put pins. An optional 9V VPP power supply is pro- vided to speed up factory programming. The device features an asymmetrical block archi- tecture and is based on a multi-level cell technolo- gy. The M30L0R8000x0 has an array of 259 blocks, and is divided into 16 Mbit banks. There are 15 banks each containing 16 main blocks of 64 KWords, and one parameter bank containing 4 pa- rameter blocks of 16 KWords and 15 main blocks of 64 KWords. The Multiple Bank Architecture allows Dual Oper- ations, while programming or erasing in one bank, read operations are possible in other banks. Only one bank at a time is allowed to be in program or erase mode. It is possible to perform burst reads that cross bank boundaries. The bank architecture is summarized in Table 2., and the memory maps are shown in Figure 4. The Parameter Blocks are located at the top of the memory address space for the M30L0R8000T0 and at the bottom for the M30L0R8000B0. By STMicroelectronics
M30L0R8000T0 's PackagesM30L0R8000T0 's pdf datasheet
M30L0R8000B0




M30L0R8000T0 Pinout, Pinouts
M30L0R8000T0 pinout,Pin out
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