128 Mbit (two 64mbit, X8/x16, Uniform Block, Flash Memories) 3v Supply, Multiple Memory Product

The M30LW128D is a 128 Mbit device that is com- posed of two separate 64 Mbit M58LW064D Flash Memories The device CAN be erased electrically at block level and programmed in-system using a 2.7V to 3.6V (VDD) supply for the circuitry and a 1.8V to VDD (VDDQ) supply for the Input/Output pins. The bus width CAN be configured for x8 or x16 for the devices available in the TSOP56 (14 x 20 mm) and TBGA64 (10x13mm, 1mm pitch) packages. The bus width is set to x16 for the devices avail- able in the LFBGA88 (8x10mm, 0.8mm pitch) package. Each internal M58LW064D has 3 Chip Enable sig- nals to allow up to 4 Memories to be connected to- gether without the use of additional glue Logic In this way the address space is contiguous and the Microprocessor only requires one Chip Enable, E, to control both Memories The device is divided into 128 blocks of 1Mbit (2 x 64 x 1Mb) that CAN be erased independently so it is possible to preserve valid data while old data is erased. Program and Erase commands are written to the Command Interface of the device. An on- chip Program/Erase Controller (P/E.C) simplifies the process of programming or erasing the device by taking care of all of the special operations that are required to update the memory contents. The end of a Program or Erase operation CAN be de- tected and any error conditions identified in the Status Register The command set required to control the device is consistent with JEDEC stan- dards. By STMicroelectronics
M30LW128D 's PackagesM30LW128D 's pdf datasheet



M30LW128D Pinout, Pinouts
M30LW128D pinout,Pin out
This is one package pinout of M30LW128D,If you need more pinouts please download M30LW128D's pdf datasheet.

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