Single Chip 32 Bit Cmos Microcomputer Electric Semiconductor

The M32000D4AFP is a new generation microcomputer with a 32-bit CPU and built-in high capacity DRAM Using this device it is possible to implement the complex applications of the Multimedia age with high performance and low power consumption. The M32000D4AFP contains 2M bytes of DRAM and 4K bytes of cache memory. The CPU is implemented with a RISC architecture and has a high performance figure of 52.4 MIPS (at an internal Clock rate of 66.6 MHz ). Memory for main storage is provided internally to the device eliminating external memory and associated control cir- cuits thus reducing overall system noise and power consumption. The CPU, internal DRAM and cache memory are connected by a 128-bit, 15 ns/cycle internal bus which virtually eliminates transfer bottlenecks in between the CPU and the memory. The M32000D4AFP internally multiplies the frequency of the input Clock signals by four. For an internal operating frequency of 66.6 MHz the input Clock fre- quency is 16.65MHz. By Mitsumi Electronics, Corp.
M32000D4AFP 's PackagesM32000D4AFP 's pdf datasheet



M32000D4AFP Pinout, Pinouts
M32000D4AFP pinout,Pin out
This is one package pinout of M32000D4AFP,If you need more pinouts please download M32000D4AFP's pdf datasheet.

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