64 Mbit 4mb X 16, Dual Bank, Burst 1.8v Supply Flash Memory

The M58CR064 is a 64 Mbit (4Mbit x16) non-vola- tile Flash memory that may be erased electrically at block level and programmed in-system on a Word-by-Word basis using a 1.65V to 2V VDD sup- ply for the circuitry and a 1.65V to 3.3V VDDQ sup- ply for the Input/Output pins. An optional 12V VPP power supply is provided to speed up customer programming. In M58CR064C and M58CR064D the VPP pin CAN also be used as a control pin to provide absolute protection against program or erase. In M58CR064P and M58CR064Q this fea- ture is disabled. The device features an asymmetrical block archi- tecture. M58CR064 has an array of 135 blocks, and is divided into two banks, Banks A and B. The Dual Bank Architecture allows Dual Operations, while programming or erasing in one bank, Read operations are possible in the other bank. Only one bank at a time is allowed to be in Program or Erase mode. It is possible to perform burst reads that cross bank boundaries. The bank architecture is summarized in Table 2, and the memory maps are shown in Figure 4. The Parameter Blocks are located at the top of the memory address space for the M58CR064C and M58CR064P and at the bot- tom for the M58CR064D and M58CR064Q. By STMicroelectronics