128mbit (8mb X16, Multiple Bank, Multi-level, Burst) 1.8v Supply Secure Flash Memories

The M58LT128GST and M58LT128GSB are 128 Mbit (8 Mbit x16) non-volatile Secure Flash Memories The devices may be erased electrically at block level and programmed in-system on a Word-by- Word basis using a 1.7 to 2.0V VDD supply for the circuitry and a 2.7 to 3.6V VDDQ supply for the Input/Output pins. An optional 9V VPP power supply is provided to speed up factory programming. The devices feature an asymmetrical block architecture and are based on a multi-level cell technology. The memory array is organized as 131 blocks, and is divided into 8 Mbit banks. There are 15 banks each containing 8 main blocks of 64 KWords, and one parameter bank containing 4 parameter blocks of 16 KWords and 7 main blocks of 64 KWords. The Multiple Bank Architecture allows Dual Operations, while programming or erasing in one bank, read operations are possible in other banks. Only one bank at a time is allowed to be in program or erase mode. It is possible to perform burst reads that cross bank boundaries. The bank architecture is summarized in Table 2, and the memory maps are shown in Figure 3. The Parameter Blocks are located at the top of the memory address space for the M58LT128GST and at the bottom for the M58LT128GSB By STMicroelectronics
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M58LT128GS Pinout, Pinouts
M58LT128GS pinout,Pin out
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