256Mbit (4 Banks X 4M X 16) 1.8V Supply, 133MHz Clock Rate, DDR Low Power SDRAM

The M65KG256AB is a 256Mbit Double Data Rate (DDR) Low Power Synchronous DRAM (LPSDRAM). The memory array is organized as 4 Banks of 4,194,304 Words of 16 bits each. The device achieves low power consumption and very high-speed data transfer using the 2-bit prefetch pipeline architecture that allows doubling the data input/output rate. Command and address inputs are synchronized with the rising edge of the Clock while data inputs/outputs are transferred on both edges of the system Clock The M65KG256AB is well suited for handheld battery powered applications like PDAs, 2.5 and 3G mobile phones and handheld computers. By STMicroelectronics
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