4 Mbit 512Kb X8 Low Power SRAM With Output EnableThe M68Z512 is a 4 Mbit (4,194,304 bit) CMOS
SRAM organized as 524,288 words by 8 bits. The
device features fully static operation requiring no
external Clocks or Timing strobes, with equal ad-
dress access and cycle times. It requires a single
5V 10% supply, and all inputs and outputs are
TTL compatible. By STMicroelectronics
|
|
|
| M68Z512 Pb-Free | M68Z512 Cross Reference | M68Z512 Schematic | M68Z512 Distributor |
| M68Z512 Application Notes | M68Z512 RoHS | M68Z512 Circuits | M68Z512 footprint |
