MAX3620 Delay Lines For High-Speed Clock Distribution Systems

The MAX3620 series is a family of high-performance passive Delay Lines for use in QDR/QDRII synchronous memory systems. These Delay Lines support high-speed transceiver Logic (HSTL) source terminated transmission with an unterminated load at the receiver, and deliver accurate delays of 0.75ns, 1.00ns, 1.25ns, and 1.50ns for the generation of the quarter Clock phase. The MAX3620 is offered in a small 3mm x 3mm package which contains two Delay Lines of equal length that CAN be driven either differentially or single-endedly.
By Maxim Integrated Products
MAX3620 's PackagesMAX3620 's pdf datasheet
MAX3620AETT QFN
MAX3620BETT QFN
MAX3620CETT QFN
MAX3620DETT QFN
MAX3620AETT-T QFN
MAX3620BETT-T QFN
MAX3620CETT-T QFN
MAX3620DETT-T QFN

MAX3620 pdf datasheet download


MAX3620 Pinout, Pinouts
MAX3620 pinout,Pin out
This is one package pinout of MAX3620,If you need more pinouts please download MAX3620's pdf datasheet.

MAX3620 Application circuits
MAX3620 circuits
This is one application circuit of MAX3620,If you need more circuits,please download MAX3620's pdf datasheet.


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