MAX3872 Multirate Clock And Data Recovery With Limiting Amplifier

The MAX3872 is a compact, multirate Clock and data recovery with Limiting Amplifier for OC-3, OC-12, OC-24, OC-48, OC-48 with FEC SONET SDH and Gigabit Ethernet (1.25Gbps/2.5Gbps) applications. Without using an external reference Clock the fully integrated phase-locked loop (PLL) recovers a synchronous Clock signal from the serial NRZ data input. The input data is then retimed by the recovered Clock providing a clean data output. An additional serial input (SLBI) is available for system loopback diagnostic testing. Alternatively, this input CAN be connected to a reference Clock to maintain a valid Clock output in the absence of data transitions. The device also includes a loss-of-lock (active-low LOL) output.
The MAX3872 contains a vertical threshold control to compensate for optical noise due to EDFAs in DWDM transmission systems. The recovered data and Clock outputs are CML with on-chip 50 back termination on each line. Its jitter performance exceeds all SONET SDH specifications.
The MAX3872 operates from a single +3.3V supply and typically consumes 580mW. It is available in a 5mm x 5mm 32-pin thin QFN with exposed-pad package and operates over a -40C to +85C temperature range.
By Maxim Integrated Products
MAX3872 's PackagesMAX3872 's pdf datasheet

MAX3872 Pinout, Pinouts
MAX3872 pinout,Pin out
This is one package pinout of MAX3872,If you need more pinouts please download MAX3872's pdf datasheet.

MAX3872 Application circuits
MAX3872 circuits
This is one application circuit of MAX3872,If you need more circuits,please download MAX3872's pdf datasheet.

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