MAX9323 One-to-Four LVCMOS-to-LVPECL Output Clock And Data Driver

The MAX9323 low-skew, low-jitter, Clock and data driver distributes one of two single-ended LVCMOS inputs to four differential LVPECL outputs. A single Logic control signal (CLK_SEL) selects the input signal to distribute to all outputs. The device operates from 3.0V to 3.6V, making the device ideal for 3.3V systems, and consumes only 25mA (max) of supply current.
The MAX9323 features low 150ps part-to-part skew, low 11ps output-to-output skew, and low 1.7ps RMS jitter, making the device ideal for Clock and data distribution across a Backplane or board. All outputs are enabled and disabled synchronously with the Clock input to prevent partial output Clock pulses.
The MAX9323 is available in space-saving 20-pin TSSOP and ultra-small 20-pin 4mm x 4mm thin QFN packages and operates over the extended (-40C to +85C) temperature range. The MAX9323 is pin compatible with Integrated Circuit Systems' ICS8535-01.
By Maxim Integrated Products
MAX9323 's PackagesMAX9323 's pdf datasheet

MAX9323 Pinout, Pinouts
MAX9323 pinout,Pin out
This is one package pinout of MAX9323,If you need more pinouts please download MAX9323's pdf datasheet.

MAX9323 Application circuits
MAX9323 circuits
This is one application circuit of MAX9323,If you need more circuits,please download MAX9323's pdf datasheet.

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