5VECL Programmable Delay Chip

The MC10E195 MC100E195 is a programmable delay chip (PDC) designed primarily for Clock de-skewing and Timing adjustment. It provides variable delay of a differential ECL input transition. The delay section consists of a chain of Gates organized as shown in the Logic symbol. The first two delay elements feature Gates that have been modified to have delays 1.25 and 1.5 times the basic Gate delay of approximately 80 ps. These two elements provide the E195 with a digitally-selectable resolution of approximately 20 ps. The required device delay is selected by the seven address inputs D[0:6], which are latched on chip by a high signal on the latch enable (LEN) control. Because the delay programmability of the E195 is achieved by purely differential ECL Gate delays the device will operate at frequencies of > 1.0 GHz while maintaining over 600 mV of output swing. By ON Semiconductor
MC10E195 's PackagesMC10E195 's pdf datasheet
MC10E195FN PLCC
MC10E195FNG PLCC
MC10E195FNR2 PLCC
MC10E195FNR2G PLCC




MC10E195 Pinout, Pinouts
MC10E195 pinout,Pin out
This is one package pinout of MC10E195,If you need more pinouts please download MC10E195's pdf datasheet.

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