Clock Generation Chip

The MC10EP139 MC100EP139 is a low skew 2/4, 4/5/6 Clock generation chip designed explicitly for low skew Clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device CAN be driven by either a differential or single- ended ECL or, if positive power supplies are used, LVPECL input signals. In addition, by using the VBB output, a sinusoidal source CAN be AC coupled into the device. If a single- ended input is to be used, the VBB output should be connected to the CLK input and bypassed to ground via a 0.01 F capacitor. By ON Semiconductor
MC10EP139 's PackagesMC10EP139 's pdf datasheet
MC10EP139DT TSSOP
MC10EP139DTG TSSOP
MC10EP139DTR2 TSSOP
MC10EP139DTR2G TSSOP
MC10EP139DW SOIC
MC10EP139DWG SOIC
MC10EP139DWR2 SOIC
MC10EP139DWR2G SOIC
MC10EP139MNG QFN
MC10EP139MNTXG QFN
MC100EP139DT TSSOP
MC100EP139DTG TSSOP
MC100EP139DTR2 TSSOP
MC100EP139DTR2G TSSOP
MC100EP139DW SOIC
MC100EP139DWG SOIC
MC100EP139DWR2 SOIC
MC100EP139DWR2G SOIC
MC100EP139MNG QFN
MC100EP139MNTXG QFN
MC100EP139




MC10EP139 Pinout, Pinouts
MC10EP139 pinout,Pin out
This is one package pinout of MC10EP139,If you need more pinouts please download MC10EP139's pdf datasheet.

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