3.3V / 5V ECL D Flip-Flop With Reset And Differential ClockThe MC10EP51 MC100EP51 is a differential Clock D flipflop with reset.
The device is functionally equivalent to the EL51 and LVEL51
devices.
The reset input is an asynchronous, level triggered signal. Data
enters the master portion of the flipflop when the Clock is LOW and is
transferred to the slave, and thus the outputs, upon a positive transition
of the Clock The differential Clock inputs of the EP51 allow the device
to be used as a negative edge triggered Flip-Flop By ON Semiconductor
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| MC10EP51 Pb-Free | MC10EP51 Cross Reference | MC10EP51 Schematic | MC10EP51 Distributor |
| MC10EP51 Application Notes | MC10EP51 RoHS | MC10EP51 Circuits | MC10EP51 footprint |
