Hex Inverting Buffer

The MC14049UB hex inverter Buffer is constructed with MOS P?channel and N?channel enhancement mode devices in a single monolithic structure. This complementary MOS device finds primaryuse where low power dissipation and/or high noise immunity is desired. This device provides logic?level conversion using only one supply voltage, VDD. The input?signal high level (VIH) CAN exceed the VDD supply voltage for logic?level conversions. Two TTL/DTL Loads CAN be driven when the device is used as CMOS?to?TTL/DTL converters (VDD = 5.0 V, VOL * 0.4 V, IOL * 3.2 mA). Note that pins 13 and 16 are not connected internally on this device; consequently connections to these terminals will not affect circuit operation.
By ON Semiconductor
MC14049UB 's PackagesMC14049UB 's pdf datasheet
MC14049UBCPG PDIP
MC14049UBDG SOIC
MC14049UBDR2G SOIC
MC14049UBDTEL TSSOP
MC14049UBDTELG TSSOP
MC14049UBDTR2 TSSOP
MC14049UBDTR2G TSSOP
MC14049UBF
MC14049UBFEL
MC14049UBFELG
MC14049UBCP PDIP
MC14049UBD SOIC
MC14049UBDR2 SOIC




MC14049UB Pinout, Pinouts
MC14049UB pinout,Pin out
This is one package pinout of MC14049UB,If you need more pinouts please download MC14049UB's pdf datasheet.

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