Octal D-Type Flip-Flop

The MC74AC273 74ACT273 has eight edge-triggered D-type Flip-Flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all Flip-Flops simultaneously. The Register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH Clock transition, is transferred to the corresponding flip- flop's Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.
By ON Semiconductor
MC74AC273 's PackagesMC74AC273 's pdf datasheet
MC74AC273DT TSSOP
MC74AC273DTR2 TSSOP
MC74AC273DTR2G TSSOP
MC74AC273DWG SOIC
MC74AC273DWR2G SOIC
MC74AC273MEL
MC74AC273MELG
MC74AC273NG PDIP
MC74AC273DW SOIC
MC74AC273DWR2 SOIC
MC74AC273N PDIP




MC74AC273 Pinout, Pinouts
MC74AC273 pinout,Pin out
This is one package pinout of MC74AC273,If you need more pinouts please download MC74AC273's pdf datasheet.

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