Low Skew CMOS PLL Clock Driver

The MC88915 Clock Driver utilizes phase-locked loop technology to lock its low skew outputs' frequency and phase onto an input reference Clock It is designed to provide Clock distribution for high performance PC's and workstations. The PLL allows the high current, low skew outputs to lock onto a single Clock input and distribute it to multiple components on a board. The PLL also allows the MC88915 to multiply a low frequency input Clock and distribute it locally at a higher (2X) system frequency. Multiple 88915's CAN lock onto a single reference Clock which is ideal for applications when a central system Clock must be distributed synchronously to multiple boards (see Figure 9). By Integrated Device Technology
MC88915 's PackagesMC88915 's pdf datasheet
MC88915EI55 PLCC
MC88915EI55R2 PLCC
MC88915EI70 PLCC
MC88915EI70R2 PLCC
MC88915FN55 PLCC
MC88915FN55R2 PLCC
MC88915FN70 PLCC
MC88915FN70R2 PLCC
MC88915TEI100 PLCC
MC88915TEI100R2 PLCC
MC88915TEI133 PLCC
MC88915TEI133R2 PLCC
MC88915TEI160 PLCC
MC88915TEI160R2 PLCC
MC88915TEI55 PLCC
MC88915TEI55R2 PLCC
MC88915TEI70 PLCC
MC88915TEI70R2 PLCC
MC88915TFN100 PLCC
MC88915TFN100R2 PLCC
MC88915TFN133 PLCC
MC88915TFN133R2 PLCC
MC88915TFN160 PLCC
MC88915TFN160R2 PLCC
MC88915TFN55 PLCC
MC88915TFN55R2 PLCC
MC88915TFN70 PLCC
MC88915TFN70R2 PLCC




MC88915 Pinout, Pinouts
MC88915 pinout,Pin out
This is one package pinout of MC88915,If you need more pinouts please download MC88915's pdf datasheet.

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