3 To 8 Line Decoder

The MM74HC138 decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications. The circuit features high noise immunity and low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low power Schottky TTL Logic
The MM74HC138 has 3 binary select inputs (A, B, and C). If the device is enabled, these inputs determine which one of the eight normally HIGH outputs will go LOW. Two active LOW and one active HIGH enables (G1, G2A# and G2B#) are provided to ease the cascading of decoders.
The decoder's outputs CAN drive 10 low power Schottky TTL equivalent loads, and are functionally and pin equivalent to the 74LS138. All inputs are protected from damage due to static discharge by Diodes to VCC and ground.
By Fairchild Semiconductor
MM74HC138 's PackagesMM74HC138 's pdf datasheet
MM74HC138M SOIC
MM74HC138MTC TSSOP
MM74HC138MTCX TSSOP
MM74HC138MTCX-NL TSSOP
MM74HC138MX SOIC
MM74HC138MX-NL SOIC
MM74HC138N DIP
MM74HC138N-NL DIP
MM74HC138SJ SOP
MM74HC138SJX SOP
MM74HC138SJX-NL SOP




MM74HC138 Pinout, Pinouts
MM74HC138 pinout,Pin out
This is one package pinout of MM74HC138,If you need more pinouts please download MM74HC138's pdf datasheet.

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