256KB And 512KB BurstRAM Secondary Cache Modules For PowerPC PReP/CHRP Platforms

The MPC2004 and MPC2005 are designed to provide burstable, high perfor- mance 256KB/512KB L2 cache for the PowerPC 60x Microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications. The modules are configured as 32K x 72 and 64K x 72 bits in a 182 (91 x 2) pin DIMM format. Each module uses four of Motorolas 5 V 32K x 18 or 64K x 18 BurstRAMs and a 5 V cache tag RAM configured as 16K x 12 for tag field plus 16K x 2 for valid and dirty status bits. By Freescale Semiconductor, Inc