Small-outline Dram Module Technology

The MT2LDT432H (X)(S) and MT4LDT832H (X)(S) are randomly accessed 16MB and 32MB Memories organized in a small-outline x32 configuration. They are specially processed to operate from 3V to 3.6V for low-voltage memory systems. During READ or WRITE cycles, each bit is uniquely addressed through the address bits, which are entered 12 bits (A0-A11) at a time. RAS# is used to latch the first 12 bits and CAS# the latter 10 bits. READ and WRITE cycles are selected with the WE# input. A Logic HIGH on WE# dictates read mode, while a Logic LOW on WE# dictates write mode. During a WRITE cycle, data-in (D) is latched by the falling edge of WE# or CAS#, whichever occurs last. If WE# goes LOW prior to CAS# going LOW, the output pin(s) remain open (High-Z) until the next CAS# cycle. By Micron Semiconductor Products
MT2LDT432H 's PackagesMT2LDT432H 's pdf datasheet



MT2LDT432H Pinout will be updated soon..., now you can download the pdf datasheet to check the pinouts !
MT2LDT432H circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

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