The 128Mb (x32) DDR SDRAM is a high-speed CMOS, dynamic random-access memory MT46V4M32 containing 134,217,728- bits. It is internally configured as a quad- bank DRAM The 128Mb DDR SDRAM uses a double data rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n- prefetch architecture with an Interface designed to transfer two data words per Clock cycle at the I/O pins. A single read or write access for the 128Mb DDR SDRAM effectively consists of a single 2n-bit wide, one-clock- cycle data transfer at the internal DRAM core and two corresponding n-bit wide, one-half-clock-cycle data transfers at the I/O pins. By Micron Semiconductor Products
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MT46V4M32 Pinout, Pinouts
MT46V4M32 pinout,Pin out
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