T1/e1 Synchronizer Semiconductor Inc

The MT9040 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides Timing and synchronization signals for T1 and E1 primary rate transmission links. The MT9040 generates ST-BUS Clock and framing signals that are phase locked to either a 19.44 MHz, 2.048MHz, 1.544MHz, or 8kHz input reference. The MT9040 is compliant with AT&T TR62411 and Bellcore GR-1244-CORE, Stratum 4; and ETSI ETS 300 011. It will meet the jitter/wander tolerance, jitter transfer, intrinsic jitter, frequency accuracy and capture range for these specifications. By Zarlink Semiconductor
MT9040 's PackagesMT9040 's pdf datasheet

MT9040 Pinout, Pinouts
MT9040 pinout,Pin out
This is one package pinout of MT9040,If you need more pinouts please download MT9040's pdf datasheet.

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