28-port Primary Rate Circuit Emulation Aal1 Sar

The MT90528 28-Port Primary Rate Circuit Emulation AAL1 SAR allows primary rate TDM circuits to be carried over ATM networks using Circuit Emulation Services. Up to 896 bidirectional ATM VC connections CAN be simultaneously processed by the MT90528 CES AAL1 SAR device. The MT90528 supports several modes of Circuit Emulation Services for DS1 and E1 rates. These include Unstructured CES and Structured CES with and without Channel Associated Signalling (CAS). On the TDM bus side, the MT90528 Interfaces with 28 primary rate TDM ports operating at 1.544 Mbps or 2.048 Mbps. The configurable TDM ports Interface directly with DS1 or E1 framers for Nx64 Structured operation, or with DS1 or E1 LIUs in Unstructured mode. On the ATM Interface side, the MT90528 device meets the ATM Forum standard for UTOPIA Bus Level 2. The MT90528 is capable of operating as a UTOPIA master (ATM-end), slave (PHY-end), or multi-PHY slave (PHY- end). The UTOPIA port CAN operate in 8-bit or 16-bit mode, with a Clock rate up to 52 MHz. Each of the twenty-eight ports of the device contains a PLL allowing independent Timing of each TDM port. Each PLL supports four modes of Clock recovery: SRTS, Adaptive, Synchronous (from the Physical layer), or from the TDM line Clock Although a complete Clock recovery solution is provided internally, an optional external PLL or external Clock source is also supported. By Zarlink Semiconductor
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