Mc68hc908ey16 Esci Lin 1.3 Drivers

  requires an MCU with a bus Clock accurate
enough to avoid errors. MCUs that use Clocks based on
crystal or ceramic Resonators easily provide very
accurate bus Clocks The LIN protocol was designed to
also allow more cost-effective solutions. MCUs with
on-chip Oscillators CAN be successfully used, even though
the on-chip Oscillators have accuracy poorer than a
crystal’s by several orders of magnitude.
The most significant change from normal UART Timing
is the increase of the usual 10-bit break to 13 bits. This
allows an MCU with an inaccurate Clock (up to ±14%) to
reliably distinguish a break from a data byte containing
eight zeros (nine including the start bit). Following this
break, the protocol specifies the inclusion of a
synchronization byte whose data is always $55. This
field includes five falling (recessive to dominant) edges
that CAN be used as a reference for Clock and/or baud rate
The MC68HC908EY16 is a high-performance MCU suitable for use in a low-cost LIN slave node. It CAN
be used with or without an external crystal. To enable use without a crystal or any other external Clock
component, it incorporates an internal Clock Generator (ICG). The ICG CAN be programmed to any
frequency from 307.2 kHz to 32 MHz in increments of 307.2 kHz. As with all HC08 MCUs, the bus
frequency is one-quarter of this Clock frequency. The use of the ICG reduces cost and eliminates the need
for pins dedicated to Clock circuitry. Not putting the Clock on external pins also greatly reduces
electro-magnetic emissions — see application note AN2344/D: HC908EY16 EMI Radiated Emissions
Results. (This document and other helpful documents are listed in the Section 9, “References”.) 
 2 MC68HC908EY16 Enhancements for LIN
The MC68HC908EY16 includes an ESCI (enhanced serial Communications interface) module that
incorporates three enhancements specifically for LIN (compared with the standard SCI used on many other
HC08 MCUs).
• The recognition of a 13-bit break
• A fractional-divide baud rate prescaler that allows fine adjustment of the baud rate
• An arbiter Counter that has 10 bits (9 bits plus an overflow bit) and CAN be used as a mini-timer to
measure break and bit times
The ICG incorporates a digitally controlled Oscillator (DCO) whose operation is fully described in
application note AN2498/D: Initial trimming of the MC68HC908 ICG. The DCO uses Registers DDIV and
DSTG that are managed by the ICG hardware to make Automatic corrections to the frequency of the Clock
The actual output frequency is determined by the user via the ICGTR and ICGMR Registers The output
frequency is set with the multiplier Register ICGMR. This Register is set to 21 ($15) at reset, giving a
default Clock frequency of 6.4512 MHz ±25% (21 times 307.2 kHz). The user CAN change this value as
required. In this application, a value of 64 is used to give a nominal bus frequency of 4.9152 MHz.
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MC33399 MC68HC908EY16 Circuit Diagram of ESCI Baud-Rate Adjustment Application
MC33399  MC68HC908EY16 Circuit Diagram of ESCI Baud-Rate Adjustment Application

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