2M X 16Bits X 4Banks Mobile Synchronous DRAM

These N128D1618LPAG2 are mobile 134,217,728 bits CMOS Synchronous DRAM organized as 4 banks of 2,097,152 words x 16 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the Clock All inputs and outputs are synchronized with the rising edge of the Clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVCMOS. By NanoAmp Solutions, Inc.
N128D1618LPAG2 's PackagesN128D1618LPAG2 's pdf datasheet

N128D1618LPAG2 Pinout, Pinouts
N128D1618LPAG2 pinout,Pin out
This is one package pinout of N128D1618LPAG2,If you need more pinouts please download N128D1618LPAG2's pdf datasheet.

N128D1618LPAG2 circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

Related Electronics Part Number

Related Keywords:

N128D1618LPAG2 Pb-Free N128D1618LPAG2 Cross Reference N128D1618LPAG2 Schematic N128D1618LPAG2 Distributor
N128D1618LPAG2 Application Notes N128D1618LPAG2 RoHS N128D1618LPAG2 Circuits N128D1618LPAG2 footprint
Hot categories