2M X 16Bits X 4Banks Mobile Synchronous DRAM

These N128D1618LPAW are mobile 134,217,728 bits CMOS Synchronous DRAM organized as 4 banks of 2,097,152 words x 16 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the Clock All inputs and outputs are synchronized with the rising edge of the Clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVCMOS. By NanoAmp Solutions, Inc.
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