2.5V / 3.3V Differential 4:1 Mux Input To 1:2 LVPECL Clock/Data Fanout / Translator

The NB7L572 is a high performance differential 4:1 Clock Data input multiplexer and a 1:2 LVPECL Clock Data fanout Buffer The INx/INx inputs includes internal 50  termination resistors and will accept differential LVPECL, CML, or LVDs Logic levels. The NB7L572 incorporates a pair of Select pins that will choose one of four differential inputs and will produce two identical LVPECL output copies of Clock or Data operating up to 7 GHz or 10 Gb/s, respectively. As such, NB7L572 is ideal for SONET GigE, Fiber Channel, Backplane and other Clock Data distribution applications. The NB7L572 INx/INx inputs, outputs and core Logic are powered by a 2.5 V 5% V or 3.3 V 10% power supply. The two differential LVPECL outputs will swing 750 mV when externally terminated with a 50  resistor to VCC 2 V, and are optimized for low skew and minimal jitter. By ON Semiconductor
NB7L572 's PackagesNB7L572 's pdf datasheet

NB7L572 Pinout, Pinouts
NB7L572 pinout,Pin out
This is one package pinout of NB7L572,If you need more pinouts please download NB7L572's pdf datasheet.

NB7L572 Application circuits
NB7L572 circuits
This is one application circuit of NB7L572,If you need more circuits,please download NB7L572's pdf datasheet.

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