1.8V / 2.5V Differential 2:1 Mux Input To 1:6 CML Clock/Data Fanout Buffer/Translator

The NB7V585M is a differential 1to6 CML Clock data distribution chip featuring a 2:1 Clock Data input multiplexer with an input select pin. The INx/INx inputs incorporate internal 50  termination resistors and will accept LVPECL, CML, or LVDs Logic levels (see Figure 9). The NB7V585M produces six identical output copies of Clock or data operating up to 6 GHz or 10 Gb/s, respectively. As such, NB7V585M is ideal for SONET GigE, Fiber Channel, Backplane and other Clock data distribution applications. The 16 mA differential CML output structure provides matching internal 50  source terminations, 400 mV output swings when externally terminated with a 50  resistor to VCC (see Figure 14) and is optimized for low skew and minimal jitter. The NB7V585M is powered with either 1.8 V or 2.5 V supply and is offered in a low profile 5x5 mm 32pin QFN package. By ON Semiconductor