150mhz Phase-locked Loop

The NE568A is a monolithic phase-locked loop (PLL) which operates from 1Hz to frequencies in excess of 150MHz and features an extended supply voltage range and a lower temperature coefficient of the VCO center frequency in comparison with its predecessor, the NE 568. The NE568A is function and pin-compatible with the NE568 requiring only minor changes in peripheral circuitry (see Figure 3). Temperature compensation network is different, no resistor on Pin 12, needs to be grounded and Pin 13 has a 3.9k resistor to ground. Timing cap, C2, is different and for 70MHz operation with temperature compensation network should be 16pF, not 34pF as was used in the NE568. The NE568A has the following improvements: ESD protected; extended VCC range from 4.5V to 5.5V; operating temperature range -55 to 125C (see Signetics Military 568A data sheet); less layout sensitivity; and lower TC of VCO (center frequency). The integrated circuit consists of a Limiting Amplifier , a current-controlled Oscillator (ICO), a phase detector, a level shift circuit, V/I and I/V converters, an output Buffer and bias circuitry with temperature and frequency compensating characteristics. The design of the NE568A is particularly well-suited for demodulation of FM signals with extremely large deviation in systems which require a highly linear output. In satellite receiver applications with a 70MHz IF, the NE568A will demodulate 20% deviations with less than 1.0% typical non-linearity. In addition to high linearity, the circuit has a loop Filter which CAN be configured with series or shunt elements to optimize loop dynamic performance. The NE568A is available in 20-pin dual in-line and 20-pin SO (surface mounted) plastic packages. By NXP Semiconductors
NE568A 's PackagesNE568A 's pdf datasheet
NE568AD
NE568AN
SA568AD
SA568AN




NE568A Pinout, Pinouts
NE568A pinout,Pin out
This is one package pinout of NE568A,If you need more pinouts please download NE568A's pdf datasheet.

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