P82B715 I2C Bus ExtenderThe P82B715 is a bipolar IC intended for application in I2C bus
systems. While retaining all the operating modes and features of the
I2C system it permits extension of the practical separation distance
between components on the I2C bus by buffering both the data
(SDA) and the Clock (SCL) lines.
The I2C bus capacitance limit of 400 pF restricts practical
Communication distances to a few meters. Using one P82B715 at
each end of a long cable (connecting Lx/Ly to Lx/Ly) reduces the
cable loading capacitance on the I2C bus by a factor of 10 times and
allows the total system capacitance load (all devices, connectors,
traces and wires that are connected to the I2C bus) to be around
3000 pF. That means longer cables or lower cost general purpose
wiring may be used to connect two separate I2C based systems
without worrying about the special voltage levels associated with
other I2C bus Buffers Multiple P82B715s CAN be connected together
in a star or multi-point architecture by their Lx/Ly ports without limit
as long as the total capacitance of the system remains less than
about 3000 pF (400 pF or less when referenced to any Sx/Sy
connection). In that arrangement the master and/or slave devices
are attached to the Sx/Sy port of each P82B715. The P82B715
alone does not support voltage level translation but it simplifies the
application of low cost Transistors for this purpose. There is no
restriction on interconnecting the Sx/Sy I/Os and those I/Os are also
fully compatible with bus Buffers that use voltage level offsets (i.e.,
PCA9511 PCA9515 Sx/Sy side of P82B96 because it duplicates
and transmits the offset voltage.
By NXP Semiconductors |
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| P82B715 Pb-Free | P82B715 Cross Reference | P82B715 Schematic | P82B715 Distributor |
| P82B715 Application Notes | P82B715 RoHS | P82B715 Circuits | P82B715 footprint |
