PCA9541 2-to-1 I²C-bus Master Selector With Interrupt Logic And Reset

The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual master I2C-bus applications where system operation is required, even when one master fails or the controller card is removed for maintenance. The two masters (for example, primary and back-up) are located on separate I2C-buses that connect to the same downstream I2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are used to select one master at a time. Either master at any time CAN gain control of the slave devices if the other master is disabled or removed from the system. The failed master is isolated from the system and will not affect Communication between the on-line master and the slave devices on the downstream I2C-bus. Three versions are offered for different architectures. PCA9541 01 with channel 0 selected at start-up, PCA9541 02 with channel 0 selected after start-up and after STOP condition is detected, and PCA9541 03 with no channel selected after start-up. The interrupt outputs are used to provide an indication of which master has control of the bus. One interrupt input (INT_IN) collects downstream information and propagates it to the 2 upstream I2C-buses (INT0 and INT1) if enabled. INT0 and INT1 are also used to let the previous bus master know that it is not in control of the bus anymore and to indicate the completion of the bus recovery/initialization sequence. Those interrupts CAN be disabled and will not generate an interrupt if the masking option is set. A bus recovery/initialization if enabled sends nine Clock pulses, a not acknowledge, and a STOP condition in order to set the downstream I2C-bus devices to an initialized state before actually switching the channel to the selected master. An interrupt is sent to the upstream channel when the recovery/initialization procedure is completed. An internal bus Sensor senses the downstream I2C-bus traffic and generates an interrupt if a channel Switch occurs during a non-idle bus condition. This function is enabled when the PCA9541 recovery/initialization is not used. The interrupt signal informs the master that an external I2C-bus recovery/initialization needs to be performed. It CAN be disabled and an interrupt will not be generated. The pass Gates of the switches are constructed such that the VDD pin CAN be used to limit the maximum high voltage, which will be passed by the PCA9541. This allows the use of different bus voltages on each pair, so that 1.8 V, 2.5 V, or 3.3 V devices CAN communicate with 5 V devices without any additional protection. The PCA9541 does not isolate the capacitive loading on either side of the device, so the designer must take into account all trace and device capacitances on both sides of the device, and pull-up resistors must be used on all channels. External pull-up resistors pull the bus to the desired voltage level for each channel. All I/O pins are 6.0 V tolerant. An active LOW reset input allows the PCA9541 to be initialized. Pulling the RESET pin LOW resets the I2C-bus state machine and configures the device to its default state as does the internal Power-On Reset (POR) function. The PCA9541 02 version is being discontinued as of December 2007 and customers should use PCA9541 01.
By NXP Semiconductors
PCA9541 's PackagesPCA9541 's pdf datasheet
PCA9541BS-01 HVQFN
PCA9541BS-02 HVQFN
PCA9541BS-03 HVQFN
PCA9541D-01 SO
PCA9541D-02 SO
PCA9541D-03 SO
PCA9541PW-01 TSSOP
PCA9541PW-02 TSSOP
PCA9541PW-03 TSSOP

PCA9541 pdf datasheet download


PCA9541 Pinout, Pinouts
PCA9541 pinout,Pin out
This is one package pinout of PCA9541,If you need more pinouts please download PCA9541's pdf datasheet.

PCA9541 Application circuits
PCA9541 circuits
This is one application circuit of PCA9541,If you need more circuits,please download PCA9541's pdf datasheet.


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