3.3V, 4+4 Output Zero-Delay Clock Driver (Bank A = Ref, Bank B = Ref), 10 To 134 MHz

The PI6C2408 is a PLL-based, zero-delay Buffer with the ability to distribute eight outputs of up to 140 MHz at 3.3 V. Two banks of four outputs exist, and, depending on product option ordered, CAN supply either reference frequency, prescaled half frequency, or multiplied 2x or 4x input Clock frequencies. The PI6C2408 family has a power-sparing feature: when input SEL2 is 0, the component will 3-state one or both banks of outputs depending on the state of input SEL1. A PLL bypass test mode also exists. This product line is available in high-drive and industrial environment versions. By Pericom Semiconductor Corporation
PI6C2408-1 's PackagesPI6C2408-1 's pdf datasheet
PI6C2408-1H
PI6C2408-2
PI6C2408-3
PI6C2408-4
PI6C2408-4I




PI6C2408-1 Pinout, Pinouts
PI6C2408-1 pinout,Pin out
This is one package pinout of PI6C2408-1,If you need more pinouts please download PI6C2408-1's pdf datasheet.

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