3.3V, 80 To134 MHz, 4 Output Zero-Delay Clock Driver

The PI6C2504A features a low-skew, low-jitter, phase-locked loop (PLL) Clock Driver distributing high-frequency Clock signals for SDRAM and server applications. By connecting the feedback FB_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to any Clock output will be nearly zero. By Pericom Semiconductor Corporation
PI6C2504A 's PackagesPI6C2504A 's pdf datasheet

PI6C2504A Pinout, Pinouts
PI6C2504A pinout,Pin out
This is one package pinout of PI6C2504A,If you need more pinouts please download PI6C2504A's pdf datasheet.

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