3.3V, 150 MHz, 10 Output Zero-Delay Clock Driver For SDRAM DIMM

The PI6C2510-133E is a enhanced, low-skew, low-jitter phase-locked loop (PLL) Clock Driver distributing high- frequency Clock signals for SDRAM and server applications. By connecting the feedback FB_OUT output to the feedback FB_IN input, the propagation delay from the CLK_IN input to any Clock output will be nearly zero. This zero-delay feature allows the CLK_IN input Clock to be distributed, providing one Clock input to one bank of ten outputs, with an output enable. This Clock Driver is designed to meet the PC133 SDRAM Registered DIMM speci, cation. For test purposes, the PLL CAN be bypassed by strapping AVCC to ground. By Pericom Semiconductor Corporation
Part Manufacturer Description Datasheet Samples
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DRV8851-33EVM Texas Instruments DRV8851-33 Evaluation Module
LM3S1133-EQC50-A2 Texas Instruments 32-BIT, FLASH, 50MHz, RISC MICROCONTROLLER, PQFP100, ROHS COMPLIANT, MS-026BED, LQFP-100
PI6C2510-133E 's PackagesPI6C2510-133E 's pdf datasheet
PI6C2510-133EL
PI6C2510-133ELE




PI6C2510-133E Pinout, Pinouts
PI6C2510-133E pinout,Pin out
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