3.3V, Low Skew Diff To LVDS Fanout Buffer

The PI6C48543 is a high-performance low-skew LVDs fanout Buffer PI6C48543 features two selectable differential inputs and translates to four LVDs outputs. The inputs CAN also be con, gured to single-ended with external resistor bias circuit. The CLK input accepts LPECL or LVDs or LVHSTL or SSTL or HCSL signals, and PCLK input accepts LVPECL or SSTL or CML signals. The outputs are synchronized with input Clock during asynchronous assertion/deassertion of CLK_EN pin. PI6C48543 is ideal for differential to LVDs translations and/or LVDs Clock Distribution Typical Clock translation and distribution applications are data- Communications and telecommunications. By Pericom Semiconductor Corporation
PI6C48543 's PackagesPI6C48543 's pdf datasheet

PI6C48543 Pinout, Pinouts
PI6C48543 pinout,Pin out
This is one package pinout of PI6C48543,If you need more pinouts please download PI6C48543's pdf datasheet.

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