1:6 Differential To LVTTL Clock/Data Distribution

PI90LVB16 is a six-channel LVTTL Clock Distribution driver with 50 picosecond channel-to-channel skew. It translates one BLVDS (Bus Low-Voltage Differential Signaling) input signal into six LVTTL- compatible output signals for distribution to adjacent chips on the same board. The PI90LVB16 accepts BLVDS (300mV typical) differ- ential input levels, and translates them to 3V CMOS output levels. The 160MHz PI90LVB16 CAN be the master Clock driving inputs of other Clock I/O pins in a multipoint environment. It CAN also drive the BLVDS Backplane with a separate channel acting as a return/ source LVTTL Clock source. The master/slave Clock selection of the driving source is controlled by the CrdCLKIN and the DE pins. An output enable pin OE, when high, forces all CLK pins high. OUT A Backplane Clock Distribution network must be able to drive many transmission line stubs. The Bus LVDs feature of the PI90LVB16 is ideal for driving data transfers in large, high-performance Backplane system applications. The device CAN be used as a source synchro- nous driver to distribute Clock signals within data and telecommu- nications systems. By Pericom Semiconductor Corporation
PI90LVB16 's PackagesPI90LVB16 's pdf datasheet



PI90LVB16 Pinout, Pinouts
PI90LVB16 pinout,Pin out
This is one package pinout of PI90LVB16,If you need more pinouts please download PI90LVB16's pdf datasheet.

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