High-speed Differential Line Receivers

The PI90LV386 PI90LVT386 family consists of sixteen differential line receivers with 3-state outputs that implement Low-Voltage Differential Signaling (LVDS). Any of the differential receivers will provide a valid logical output state with a 100mV differential input voltage within the input common-mode voltage range that allows 0 to 3V of ground potential difference between two LVDs nodes. The indepen- dent EN pins CAN be used to place the outputs in either a normal Logic state (high or low Logic levels) or a high-impedance state. In high- impedance state, outputs neither load nor drive the bus lines. The intended application of these devices, and their signaling techniques, is for point-to-point baseband data transmission over controlled impedance media of approximately 100-ohms with a 100-Ohm termination resistor. The PI90LVT386 integrates the termi- nating resistors while the PI90LV386 requires external resistors. The transmission media may be printed circuit board traces, Backplanes or cables. The PI90LV386s 16 receivers integrated into the same substrate allow precise Timing alignment. By Pericom Semiconductor Corporation
PI90LVT386 's PackagesPI90LVT386 's pdf datasheet
PI90LV368A
PI90LV368AE
PI90LVT368A
PI90LVT368AE




PI90LVT386 Pinout, Pinouts
PI90LVT386 pinout,Pin out
This is one package pinout of PI90LVT386,If you need more pinouts please download PI90LVT386's pdf datasheet.

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