1-to-4 Clock Distribution Buffer - Phaselink Corporation

The PLL103-04 is a 1-to-4 Clock Distribution Buffer reproducing the reference input frequency (FIN) at 4 different outputs. It is designed to minimize skew between outputs and provides TTL and CMOS compatible output levels. An output enable selector is available to tri-state all outputs. By PhaseLink Corp.
PLL103-04 's PackagesPLL103-04 's pdf datasheet

PLL103-04 Pinout, Pinouts
PLL103-04 pinout,Pin out
This is one package pinout of PLL103-04,If you need more pinouts please download PLL103-04's pdf datasheet.

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