Parallel Connection

Power op amps CAN be paralleled to increase current, im- prove SOA (Safe-Operating-Area), or double thermal capabil- ity. While the basic topology seems simple, there are design details which require careful attention such as common-mode range considerations, stability, slew rate, and losses which CAN reduce efficiency and increase power dissipation. 1.0 BASIC PARALLEL TOPOLOGY A1 in Figure 1 referred to as the master amplifier, CAN be configured in any form desired, inverting or non-inverting, and any gain desired. Feedback for A1, and only A1, will come from the overall output of the parallel connection. The output of each amplifier will have in series equal small-value resistors to improve current sharing characteristics. The slave amplifiers, A2 and up to An, are configured as unity gain non-inverting Buffers driven from the output terminal of the master amplifier A1. Each slave’s individual feedback is taken directly at its output terminal. The idea of this connection is since each slave is a unity gain Buffer the slave outputs will match as closely as pos- sible the output of the master. Yet with the master feedback being wrapped around the entire circuit, overall accuracy is maintained.
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Parallel Connection application circuits
Parallel Connection application circuits



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