Enhanced SCAN Bridge Multidrop Addressable IEEE 1149.1 (JTAG) PortThe SCANSTA111 extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANSTA111 supports up to 3 local IEEE1149.1 scan rings which CAN be accessed individually or combined serially. Addressing is accomplished by loading the instruction Register with a value matching that of the Slot inputs. Backplane and inter-board testing CAN easily be accomplished by parking the local TAP Controllers in one of the stable TAP Controller states via a Park instruction. The 32-bit TCK Counter enables built in self test operations to be performed on one port while other scan chains are simultaneously tested.
By National Semiconductor Corporation |
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| SCANSTA111 Pb-Free | SCANSTA111 Cross Reference | SCANSTA111 Schematic | SCANSTA111 Distributor |
| SCANSTA111 Application Notes | SCANSTA111 RoHS | SCANSTA111 Circuits | SCANSTA111 footprint |
