7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer

The SCANSTA112 extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANSTA112 supports up to 7 local IEEE1149.1 scan chains which CAN be accessed individually or combined serially.
Addressing is accomplished by loading the instruction Register with a value matching that of the Slot inputs. Backplane and inter-board testing CAN easily be accomplished by parking the local TAP Controllers in one of the stable TAP Controller states via a Park instruction. The 32-bit TCK Counter enables built in self test operations to be performed on one port while other scan chains are simultaneously tested.
The STA112 has a unique feature in that the Backplane port and the LSP0 port are bidirectional. They CAN be configured to alternatively act as the master or slave port so an alternate test master CAN take control of the entire scan chain network from the LSP0 port while the Backplane port becomes a slave.
By National Semiconductor Corporation
SCANSTA112 's PackagesSCANSTA112 's pdf datasheet
SCANSTA112EVK
SCANSTA112SM FBGA
SCANSTA112SMX FBGA
SCANSTA112VS TQFP
SCANSTA112VSX TQFP

SCANSTA112 pdf datasheet download


SCANSTA112 Pinout, Pinouts
SCANSTA112 pinout,Pin out
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