SCG3040 Synchronous Clock Generator

The SCG3040 is designed for use as a reference input for OC-48 Framers and SERDES. It generates less than 1 psRMS jitter over the OC-48 bandwidth. SCG3040 is well suited for use in line cards, service termination cards and similar functions to provide reliable reference, phase locked, synchronization for TDM, PDH, SONET and SDH network equipment. The SCG3040 provides a jitter filtered, wander following output signal synchronized to a superior Stratum or peer input reference signal. By Connor-Winfield VCXOs
SCG3040 's PackagesSCG3040 's pdf datasheet



SCG3040 Pinout, Pinouts
SCG3040 pinout,Pin out
This is one package pinout of SCG3040,If you need more pinouts please download SCG3040's pdf datasheet.

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