SCG3041 Series Synchronous Clock Generators

The SCG3041 is designed for use as a reference input for OC-48 Framers and SERDES. It generates less than 1 psRMS jitter over the OC-48 bandwidth. SCG3041 is well suited for use in line cards, service termination cards and similar functions to provide reliable reference, phase locked, synchronization for TDM, PDH, SONET and SDH network equipment. The SCG3041 provides a jitter filtered, wander following output signal synchronized to a superior Stratum or peer input reference signal. The SCG3041 differs from SCG3040 by providing a CMOS output at 77.76 MHz. By Connor-Winfield VCXOs
SCG3041 's PackagesSCG3041 's pdf datasheet



SCG3041 Pinout, Pinouts
SCG3041 pinout,Pin out
This is one package pinout of SCG3041,If you need more pinouts please download SCG3041's pdf datasheet.

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