Synchronous Clock Generators

The SCG4001 is a digital Phase locked loop generating a LVPECL outputs from an intrinsically low jitter voltage controlled crystal Oscillator The LVPECL outputs may be disabled. The jitter attenuated internal reference, divided down from the output frequency, is also output to a pin. The SCG4001 CAN only lock to an 8kHz reference. A filtered reference output signal is available at the same frequency. The unit has an acquisition time of about 1 second and it is tolerant of different reference duty cycles. Further features include alarm outputs for Loss-of- Reference (LOR) and Loss-of-Lock (LOL). During the LOR alarm, the SCG4000 will also enter a Free Run state, By Connor-Winfield VCXOs
SCG4001 's PackagesSCG4001 's pdf datasheet



SCG4001 Pinout, Pinouts
SCG4001 pinout,Pin out
This is one package pinout of SCG4001,If you need more pinouts please download SCG4001's pdf datasheet.

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