Synchronous Clock Generators

The SCG4505 is a Mixed-Signal Phase locked loop generating LVPECL outputs from an intrinsically low jitter, voltage controlled, crystal Oscillator The LVPECL outputs may be disabled. The SCG4505 also provides a CMOS Output @ 77.76 MHz on the REF_OUT pin. The SCG4505 CAN lock to one of two external references, which is selectable using the SELAB input select pin. The unit has a fast acquisition time of about 1 second and it is tolerant of different reference duty cycles. The SCG4505 includes an alarm output that indicates deviations from normal operation. If a Loss- of-Reference (LOR) or Loss-of-Lock (LOL) is detected the alarm with indicate the need for a reference rearrangement. If both references A and B are absent the module will enter Free Run operation. The FRstatus pin will indicate that the module is in Free Run operation. Frequency stability during Free Run operation is guaranteed to ±20 ppm. Additionally the Free Run mode may be entered manually. The package dimensions are 1.00” x 1.025” x 0.45” on a 6 layer FR4 board with castellated pins. Parts are assembled using high temperature solder to withstand 63/37 alloys, 180°C surface mount reflow processes. By Connor-Winfield VCXOs
SCG4505 's PackagesSCG4505 's pdf datasheet

SCG4505 Pinout will be updated soon..., now you can download the pdf datasheet to check the pinouts !
SCG4505 circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

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