N-channel 25-v (d-s) Mosfet - Vishay Siliconix

The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the 55 to 125C temperature ranges under the pulsed 0 to 5V Gate drive. The saturated output impedance is best fit at the Gate bias near the threshold voltage. By Vishay Intertechnology
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SI1404DH Pinout will be updated soon..., now you can download the pdf datasheet to check the pinouts !
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