SiPHY™ OC-48/STM-16 CLOCK AND DATA RECOVERY IC WITH FEC

The SI5018 is a fully-integrated low-power Clock and Data Recovery (CDR) IC designed for high-speed serial Communication systems. It extracts Timing information and data from a serial input at OC-48/STM-16 data rates. In addition, support for 2.7 Gbps data streams is also provided for applications that employ forward error correction (FEC). DSPLL technology eliminates sensitive noise entry points thus making the PLL less susceptible to board-level interaction and helping to ensure optimal jitter performance. The SI5018 represents a new standard in low jitter, low power, and small size for high speed CDRs. It operates from a single 2.5 V supply over the industrial temperature range (40 to 85 C). By Silicon Laboratories
SI5018 's PackagesSI5018 's pdf datasheet
SI5018-X-GM QFN




SI5018 Pinout, Pinouts
SI5018 pinout,Pin out
This is one package pinout of SI5018,If you need more pinouts please download SI5018's pdf datasheet.

SI5018 Application circuits
SI5018 circuits
This is one application circuit of SI5018,If you need more circuits,please download SI5018's pdf datasheet.


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