The SI5321 is a precision Clock multiplier that exceeds the requirements of high-speed Communication systems, including OC-192/OC-48 and 10 Gigabit Ethernet This device phase locks to an input Clock in the 19, 39, 78, 155, 311 or 622 MHz frequency range and generates a frequency-multiplied Clock output that CAN be configured for operation in the 19, 39, 78, 155, 622, 1244, or 2488 MHz frequency range. Silicon Laboratories DSPLL technology provides PLL functionality with unparalleled performance. It eliminates external loop Filter components, provides programmable loop parameters, and simplifies design. FEC rates are supported by selectable forward and reverse 255/ 238 (15/14), 255/237 (85/79), and 66/64 (33/32) conversion factors. The ITU-T G.709 255/237 rate and the IEEE 802.3ae 66/64 rate are supported when using a 155 MHz or higher rate input Clock The performance and integration of Silicon Laboratories SI5321 Clock IC provides high-level support of the latest specifications and systems. It operates from a single 3.3 V supply. By Silicon Laboratories
SI5321 's PackagesSI5321 's pdf datasheet

SI5321 Pinout, Pinouts
SI5321 pinout,Pin out
This is one package pinout of SI5321,If you need more pinouts please download SI5321's pdf datasheet.

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