PIN-PROGRAMMABLE PRECISION CLOCK MULTIPLIER/JITTER ATTENUATORThe SI5323 is a jitter-attenuating precision Clock
multiplier for high-speed Communication systems,
including SONET OC-48/OC-192, Ethernet and Fibre
Channel. The SI5323 accepts dual Clock inputs ranging
from 8 kHz to 707 MHz and generates two equal
frequency-multiplied Clock outputs ranging from 8 kHz
to 1050 MHz. The input Clock frequency and Clock
multiplication ratio are selectable from a table of
popular SONET Ethernet and Fibre Channel rates.
The SI5323 is based on Silicon Laboratories' 3rd-
generation DSPLL technology, which provides any-
rate frequency synthesis and jitter attenuation in a
highly integrated PLL solution that eliminates the need
for external VCXO and loop Filter components. The
DSPLL loop bandwidth is digitally programmable,
providing jitter performance optimization at the
application level. Operating from a single 1.8, 2.5, or
3.3 V supply, the SI5323 is ideal for providing Clock
multiplication and jitter attenuation in high performance
Timing applications. By Silicon Laboratories
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