The SI5365 is a low jitter, precision Clock multiplier for high-speed Communication systems, including SONET OC-48/OC-192, Ethernet and Fibre Channel, in which the application requires Clock multiplication without jitter attenuation. The SI5365 accepts four Clock inputs ranging from 19.44 to 707 MHz and generates five frequency-multiplied Clock outputs ranging from 19.44 to 1050 MHz. The input Clock frequency and Clock multiplication ratio are selectable from a table of popular SONET Ethernet and Fibre Channel rates. The SI5365 is based on Silicon Laboratories' 3rd- generation DSPLL technology, which provides any- rate frequency synthesis in a highly integrated PLL solution that eliminates the need for external VCXO and loop Filter components. The DSPLL loop bandwidth is digitally programmable, providing jitter performance optimization at the application level. Operating from a single 1.8 or 2.5 V supply, the SI5365 is ideal for providing Clock multiplication in high performance Timing applications. By Silicon Laboratories
SI5365 's PackagesSI5365 's pdf datasheet

SI5365 Pinout, Pinouts
SI5365 pinout,Pin out
This is one package pinout of SI5365,If you need more pinouts please download SI5365's pdf datasheet.

SI5365 Application circuits
SI5365 circuits
This is one application circuit of SI5365,If you need more circuits,please download SI5365's pdf datasheet.

Related Electronics Part Number

Related Keywords:

SI5365 Pb-Free SI5365 Cross Reference SI5365 Schematic SI5365 Distributor
SI5365 Application Notes SI5365 RoHS SI5365 Circuits SI5365 footprint