The SI5366 is a jitter-attenuating precision Clock multiplier for high-speed Communication systems, including SONET OC-48/OC-192, Ethernet and Fibre Channel. The SI5366 accepts four Clock inputs ranging from 8 kHz to 707 MHz and generates five frequency- multiplied Clock outputs ranging from 8 kHz to 1050 MHz. The input Clock frequency and Clock multiplication ratio are selectable from a table of popular SONET Ethernet and Fibre Channel rates. The SI5366 is based on Silicon Laboratories' 3rd- generation DSPLL technology, which provides any- rate frequency synthesis and jitter attenuation in a highly integrated PLL solution that eliminates the need for external VCXO and loop Filter components. The DSPLL loop bandwidth is digitally programmable, providing jitter performance optimization at the application level. Operating from a single 1.8 or 2.5 V supply, the SI5366 is ideal for providing Clock multiplication and jitter attenuation in high performance Timing applications. By Silicon Laboratories
SI5366 's PackagesSI5366 's pdf datasheet

SI5366 Pinout, Pinouts
SI5366 pinout,Pin out
This is one package pinout of SI5366,If you need more pinouts please download SI5366's pdf datasheet.

SI5366 Application circuits
SI5366 circuits
This is one application circuit of SI5366,If you need more circuits,please download SI5366's pdf datasheet.

Related Electronics Part Number

Related Keywords:

SI5366 Pb-Free SI5366 Cross Reference SI5366 Schematic SI5366 Distributor
SI5366 Application Notes SI5366 RoHS SI5366 Circuits SI5366 footprint